Charlie S.

Charlie S. is an experienced ASIC and FPGA Design Engineer currently working at Lockheed Martin since June 2019, where responsibilities include verifying FPGA designs using System Verilog and UVM Standard. Prior experience includes an Electrostatic Discharge (ESD) Engineering Internship at NXP Semiconductors, focusing on testing electronic devices and optimizing procedures in NXP's ESD lab, as well as a Process Engineering Internship at the same company, which involved auditing stress qualification procedures. Charlie holds a Master of Science in Space Systems Engineering from Johns Hopkins Whiting School of Engineering (2020-2023) and a Bachelor of Science in Computer Engineering and Electrical Engineering from The University of Texas at Austin (2015-2019).