Ryan Y Hao Lim

Senior Staff Soc Design Engineer at MaxLinear

Ryan Y Hao Lim is a Senior Staff SoC Design Engineer at MaxLinear. Prior to this role, Ryan held positions at Silicon Labs as a Senior Digital Design Engineer, as well as a Digital Design Engineer, and Applications Engineer. Ryan also has experience as a Firmware Intern at Lantiq and Digital IC Design Intern at Infineon AG. Ryan holds a MSc in Integrated Circuit Design from Technical University of Munich and a BSc in Electrical And Electronic Engineering from Nanyang Technological University Singapore.

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Timeline

  • Senior Staff Soc Design Engineer

    September, 2021 - present