Giuseppe Santoriello is an experienced engineer with a robust background in electronic design and development, particularly in FPGA and firmware applications. Currently employed at MEDINOK S.P.A. since May 2017, Giuseppe focuses on XILINX FPGA HDL and firmware development for the 802.11ad application within the OSMOSI project. Previous roles include Senior Electronic Design Engineer positions at Meditel and Medinok spa, where work involved feasibility studies and R&D for defense and space equipment. Giuseppe began a career in electronic design at Italtel Telematica and accumulated extensive experience at Alcatel-Lucent, contributing to R&D and production processes. Giuseppe holds a degree in Electronic Engineering from Università degli Studi di Napoli Federico II.
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