Hugh Walsh

Hugh Walsh is an experienced professional in ASIC design and engineering, currently working at Meta since December 2025. Prior to this role, Hugh served as ASIC Technical Lead and Senior Manager at Google from August 2019 to April 2022, where leadership expertise was demonstrated in designing advanced ASICs and IPs for cloud datacenter networking and storage. From November 2000 to July 2019, Hugh held the position of Director of Design Engineering at Marvell Semiconductor, overseeing design and verification of networking and automotive SoC, ASIC, and IP products, while leading a global engineering team. Additionally, from May 2022 to April 2025, Hugh worked as Senior Director of ASIC & FPGA Engineering at Palo Alto Networks. Academic qualifications include a Master of Science in Electrical Engineering from Stanford University and a Bachelor of Science in Electrical Engineering with Highest Honors from Princeton University.