Adam Kiepul has extensive experience in FPGA and emulator-based processor IP verification, currently serving as Member Technical Staff at MIPS since May 2022 and previously as Senior Staff Engineer at Wave Computing since June 2018. Adam's career includes roles as Senior Software Design Engineer at MIPS and Imagination Technologies, focusing on MIPS processor core design verification. Additional experience includes a significant tenure at PMC-Sierra as Tech Lead Applications Engineering, providing customer and internal support for high-end MIPS-based microprocessors, and earlier positions at NEC Electronics and Philips Semiconductors involving MIPS RISC microprocessors. Adam holds a Master of Science degree in Computer Science from Wrocław University of Science and Technology.
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