Joanne Ottney

Joanne Ottney is an accomplished engineering executive with extensive experience in hardware and ASIC/FPGA engineering leadership. Currently serving as Vice President of Hardware Engineering and Vice President of ASIC/FPGA Engineering at Palo Alto Networks, Joanne has previously held significant roles including Director of ASIC Engineering at both TZero Technologies and ATI Research Silicon Valley, and Director of Engineering at Cisco. Joanne's technical expertise is further supported by a Master of Science in Electrical Engineering from Stanford University and a Bachelor of Electrical Engineering from GMI Engineering and Management Institute.