Divanshu Chaturvedi

Divanshu Chaturvedi is an experienced engineering professional with a strong background in circuit design and management. Currently serving as Engineering Manager at Rambus since August 2019, Divanshu oversees the clocking subsystem of DDR5 buffer chip products, ensuring the functionality of various components such as PLL, PI, and clock circuits. Prior to this role, Divanshu worked at Synopsys Inc as a Senior Member of Technical Staff, focusing on the design optimization of clock and data recovery circuits for high-speed SERDES PHY IPs. Divanshu's career started with co-founding Bookmybook.co.in and includes positions at STMicroelectronics as a Design Engineer and a Trainee, where skills in advanced circuit design and thermal analysis were developed. Divanshu holds a B Tech degree in Electrical and Electronics Engineering from the Indian Institute of Technology Hyderabad.