Anas Zameer

Anas Zameer began their work experience in 2019 as an Internet of Things Engineer at CIT. In 2020, they joined Lampró Méllon as an Associate Design and Verification Engineer. During this time, Anas worked on various projects involving RTL design, integration, verification, and scriptwriting. Anas also collaborated with SiFive and was responsible for running regressions, debugging failures, and automating regressions using scripts. In 2021, Anas joined RapidSilicon as an Associate Design Verification Engineer. No additional information is provided about their role at this company.

Anas Zameer attended the University of Engineering and Technology, Taxila from 2015 to 2019, where they completed their Bachelor of Science (BSC) in Computer Engineering. In addition to their degree, Anas Zameer obtained several certifications. In October 2020, they completed the Crash Course on Python offered by Google. Anas also received the Lampró Méllon System On Chip (SOC) Certification from Lampró Méllon in the same month. Furthermore, in March 2021, Anas Zameer successfully completed the SystemVerilog for Design and Verification v20.6 Exam conducted by Cadence Design Systems.