ROMAN SHAH

Roman Shah has a strong background in hardware design engineering. ROMAN began their career in 2016 as a Hardware Design Engineer at Pakistan Air Force, where they worked until 2017. In 2018, they joined the Cyber Reconnaissance and Combat Center as a Senior Hardware Design Engineer, where they worked for four years until 2022. Currently, Roman is working as an FPGA Design Engineer at Rapid Silicon since July 2022.

Roman Shah completed their secondary education at GHSS No.1 Dargai from 2007 to 2008, where they studied Science. ROMAN then pursued their higher secondary education at GDC Malakand Dargai from 2008 to 2010, specializing in Pre-Engineering. Eventually, Roman attended COMSATS University Islamabad from 2011 to 2015, where they obtained their Bachelor of Engineering in Electrical and Computer Engineering.