Nadeem Yaseen

Nadeem Yaseen started working at Lampró Méllon in January 2020 as an Associate Design Engineer. In this role, they developed a workflow to automate the integration of SweRV core with Google RISC V DV environment. Nadeem also wrote a python-based tool to monitor the CPU, RAM, and storage usage of small-scale production servers. Additionally, they developed a Docker image to integrate Synopsys EDA tools in the OpenLANE flow. Nadeem joined Rapid Silicon in December 2021 as an EDA Engineer.

Nadeem Yaseen completed their BSc in Electrical Engineering from the University of the Punjab from 2014 to 2018. In addition to their degree, they obtained several certifications. These certifications include "Deploy an Auto-Scaling HPC Cluster with Slurm" from Google in June 2023, "Introduction to High Performance Computing" from the University of Colorado in April 2023, "Terraform on Google Cloud" from Google in April 2023, "FPGA-Fabric, Design and Architecture" from VSD-IAT Workshop in March 2022, "Linux Operating System" from StudySection, and "Microsoft DevOps Academy" from Microsoft Azure DevOps. The month and year of completion for the certifications "Linux Operating System" and "Microsoft DevOps Academy" are not provided.