Suvarna Palla

Suvarna Palla is a Senior Physical Design Engineer at AMD since March 2022, with prior experience as a Layout Engineer at SeviTech Systems Pvt. Ltd. from October 2017 to March 2022, specializing in functional unit block layouts and RFIP layouts in advanced nodes including 14nm, 10nm, and 7nm. Previously, Suvarna worked as a Physical Design Engineer at Intel Corporation for a brief period in 2013. Suvarna holds a Bachelor of Technology degree in Electrical, Electronics, and Communications Engineering from Sreenidi Institute of Science & Technology, obtained between 2014 and 2017.