Azar Kenyon

Azar Kenyon is a seasoned engineering professional with extensive experience in analog design and signal processing, currently serving as Design Director for the DDR Data Buffer team at Renesas Electronics since May 2022. Previously, Azar held roles at Cadence Design Systems as a Staff Analog Design Engineer, specializing in next-generation SERDES Analog & Mixed Signal IP design, and significantly contributed to Texas Instruments as an Analog Design Lead, where responsibilities included architecting PCIe Redriver designs and leading multiple product development efforts. Azar's experience also encompasses mentorship roles and team leadership in analog engineering, underscored by a solid educational foundation with both a B.S. and M.S. in Electrical Engineering from Georgia Institute of Technology.