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Mounika vandanapu

Senior Layout Engineer 1 at Sankalp Semiconductor

Mounika Vandanapu is a seasoned Senior Layout Engineer 1 at Sankalp Semiconductor since September 2019, specializing in standard cell layout engineering. Prior experience includes serving as an Associate Member of Technical Staff at DXCorr Design Inc from November 2017 to September 2019 and working as a layout engineer. Mounika also completed a training program in design and verification at Maven Silicon in 2017, along with a brief tenure as an embedded systems trainee at Microlink Solutions Pvt. Ltd. in mid-2016. Mounika's educational background includes a Bachelor of Technology (B.Tech.) in Electronics and Communications Engineering from Kakinada Institute of Engineering and Technology for Women (2013-2017) and an Intermediate degree from Sree Chaitanya Mahila Kalasala, Vijayawada (2011-2013).

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