POOJA S is a Senior Software Engineer at Sankalp Semiconductor since September 2021, previously holding the title of Software Engineer. Prior experience includes design and verification using Verilog at Entuple Technologies Pvt. Ltd. for a brief period in mid-2020, where notable projects involved state machine design, dual port memory design, and serial adder implementation. POOJA also undertook VLSI-related projects, including UART and FIFO, during a short stint at Cranes Varsity in early 2020. POOJA holds a Bachelor of Engineering in Electronics and Instrumentation Engineering from Bangalore Institute of Technology, completed in 2021, with earlier education at Kendriya Vidyalaya DRDO from 2008 to 2015 and Kendriya Vidyalaya No. 1 from 2005 to 2008.
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