Shweta Thakar is an experienced ASIC Senior Verification Engineer at SeviTech Systems Pvt. Ltd. since April 2021, with a prior role as an Application Specific Integrated Circuit Verification Engineer at eInfochips from July 2017 to April 2021. Shweta began the career as a Trainee Engineer at eiTRA - eInfochips Training & Research Academy Ltd from January 2017 to June 2017, focusing on the SPI protocol and developing testbenches in SystemVerilog and UVM. Shweta holds a Bachelor of Engineering in Electronics and Communications Engineering from Marwadi Education Foundation Group Of Institution, completed in 2016, and has completed Higher Secondary Certificate in Maths-Science from Nirmala Convent School in 2013, as well as Secondary School Certificate from Saint Xaviers School in 2011.
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