Yagnesh Chaudhari

Design Verification Engineer at SignOff Semiconductors

Yagnesh Chaudhari is a Design Verification Engineer at SignOff Semiconductors, where responsibilities have also included roles as an RTL Design Engineer and Physical Design Engineer since August 2022. Prior to this, Yagnesh served as a SoC Verification Engineer at SION Semiconductors Private Limited from October 2021 to April 2022, and as a BMS/Sales Engineer at SAI-RAJ AUTOMATION & CONTROLS PRIVATE LIMITED for a brief period in late 2019. Yagnesh holds a Master of Technology (MTech) in Embedded and VLSI from Shri Guru Gobind Singhji Institute of Engineering and Technology, obtained in 2022, as well as a Bachelor of Engineering (BE) in Electronics and Telecommunications from Shivajirao S Jondhale College of Engineering, completed in 2019.

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