Quanhao Yu

Quanhao Yu has work experience as a Digital IC Verification Engineer at Silicon Integrated Co., Ltd starting in 2022. Prior to that, in 2021, Quanhao worked as an Electronic Architect Intern at ASML, where they investigated functional safety on an FPGA and collaborated with other teams on developing and maintaining the safety system. Additionally, Quanhao gained experience as an Electrical Engineering Intern at Tianpai Numerical Control in 2020, focusing on the application of Programmable Logic Controller (PLC) devices and learning different methods in digital system design.

Quanhao Yu completed a Bachelor of Engineering (BE) degree in Electronic Information Engineering from Harbin Engineering University in the years 2016 to 2020. Following this, Quanhao pursued a Master of Science (MS) degree in Electrical Engineering with a track in Microelectronics from Delft University of Technology, starting in 2020 and finishing in 2022.