Xiao Dayang

Xiao Dayang has a diverse work experience in various companies and academic institutions. In 2017, they worked as an Electrical Engineering Intern at The 45th Research Institute of China Electronics Technology Group Corporation, where they assembled flip-chip bonders, performed tests, and detected positions of implanted chips. From 2017 to 2018, they joined Central South University as a Flexible Loading Microprobe Device Design Engineer, where they designed a micro-magnetorheological damper to reduce load shocks on probes and chips. In 2019, they joined Technische Universiteit Delft and worked on projects such as designing a Discrete-Time Programmable Gain Amplifier and a Class-D Amplifier with bridge-tied-load amplifier. Xiao also worked on projects involving integrated programmable high-voltage pulsers for ultrasound probes and stacked miniLEDs for in vivo optogenetics. Currently, they are serving as a Senior Analog IC Design Engineer at Silicon Integrated Co., Ltd.

Xiao Dayang pursued a Master's degree in Microelectronics at Delft University of Technology from 2018 to 2020. Prior to that, from 2014 to 2018, they completed their Bachelor of Engineering in Microelectronics Manufacturing Engineering at Central South University.