Karthik Vadhulas K

Karthik Vadhulas K is a Senior Application Engineer at Silvaco Inc since March 2018, specializing in multi-voltage designs and RTL to GDS implementation using industry-standard EDA tools. Karthik possesses expertise in leading design teams and delivering quality Standard cell IPs across multiple process nodes, while directly addressing customer issues in backend design. Prior experience includes roles as a Standard Cell Design Engineer at Nangate, where Karthik focused on benchmarking and reliability testing of standard cell libraries, and an ASIC Design Intern at Scalable Systems Research Labs, contributing to an IoT controller ASIC. Earlier positions at Wipro involved Unix application development and back-end design in Python, while internships at Bharat Electronics and Virtual Logic Systems provided experience in missile system testing and USB communication design, respectively. Karthik holds a Master of Science in Electrical Engineering from The University of Texas at Dallas and a Bachelor of Engineering in Electronics and Communication Engineering from SJB Institute of Technology.