MLN Swamy is an experienced Design Verification Engineer with a career spanning multiple roles in the semiconductor industry. Currently working at Tech Mahindra Cerium Pvt Ltd as a Senior Verification Engineer since October 2023, MLN Swamy focuses on a PCIE project. Prior to this, MLN Swamy held the position of Design Verification Engineer at SiSoC Semiconductor Technologies Pvt Ltd from October 2021 and at Marvell India from March 2022 to April 2023, where responsibilities included IP level verification. MLN Swamy started the professional journey as an Internship Trainee at Vedic School of VLSI Design in early 2019. Academic credentials include a degree in VLSI Design from Aditya Engineering College and a Bachelor of Engineering in Electronics and Communication Engineering from Andhra University.
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