Marcin Siebert

Marcin Siebert has extensive experience in hardware and FPGA design, holding positions at prominent companies within the technology sector. Currently a Hardware Developer at Squarepoint Capital since January 2023, Marcin previously worked as a SoC Design Engineer at Intel Corporation from January 2016 to March 2023. Additional roles include Electronic Design Engineer at Altera, Senior Engineer R&D FPGA at ADVA Optical Networking, and various positions at Pace plc, including Principal FPGA Engineer and Senior FPGA Engineer, as well as earlier roles at DGT Sp. z o.o and Chipidea. Marcin's expertise encompasses FPGA design and verification, particularly in digital TV solutions and Ethernet access systems.