Aniket Shelar is a highly experienced Staff R&D Engineer currently working at Synopsys Inc since September 2023, previously serving as a Sr-II R&D Engineer. Prior to this role, Aniket held the position of Project Lead at Tech Mahindra Cerium Pvt Ltd from October 2016 to September 2023, overseeing complete TX deliverables, coordinating a team of engineers, and engaging in technical discussions for recruitment. Aniket's earlier roles include Sr. Analog Design Engineer and Analog Design Engineer, focusing on RX/TX architecture validation, circuit design, and reliability analysis across advanced technology nodes. Aniket's professional journey began at STMicroelectronics as an IO Design and Validation Trainee, contributing to analog IO design projects and performing signal integrity analyses. Aniket holds a Master’s Degree in VLSI Design from Vellore Institute of Technology and an Engineer's Degree in Electronics and Telecommunication from Mumbai University.
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