Synopsys
Hoang Nguyen is a seasoned engineering professional with extensive experience in design verification and ASIC design. Currently serving as Principal Engineer in Design Verification at Synopsys Inc since January 2025, Hoang has previously held positions at AMD as MTS Silicon Design Engineer, and at Xilinx as Senior Design Verification Engineer. Additional roles include Senior Design Verification Engineer at Bridgetek and Senior ASIC Design Verification Engineer at Applied Micro Circuits, where logic verification for an ARM 64-bit server-class SoC was a key responsibility. Hoang's career began at Renesas Design Vietnam Co., Ltd. as a Design Engineer, focusing on integrating and verifying non-CPU IPs for SoC systems. Hoang holds a Bachelor's degree in Mechatronics from Ho Chi Minh City University of Technology and an MBA from CFVG.
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