Tianfan Chen

Senior ASIC Verification Engineer at Sigma Designs

Tianfan CHEN is an experienced Senior ASIC Verification Engineer currently working at PROPHESEE. With a background in Electronic Engineering and Computer Science, Tianfan has led various verification projects at Sigma Designs, focusing on video decoders and event-based sensor systems. From developing firmware to verifying complex modules, Tianfan's expertise in SystemVerilog and RISC-V architecture have been instrumental in ensuring the success of multiple projects throughout their career.

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Timeline

  • Senior ASIC Verification Engineer

    September, 2015 - present

  • ASIC Verification Engineer

    September, 2010

  • Firmware Engineer

    September, 2008

  • Internship Engineering

    September, 2007