Yaakov Farfel has a diverse work experience in the field of design verification engineering, spanning across various semiconductor companies. Yaakov started their career at Cisco Systems in 1997 as a Verification Engineer and eventually became a Senior Verification Engineer. After leaving Cisco in 2009, they worked as a Verification Engineer and Contractor for several companies including Broadcom, Valens, Nuvoton Technology Israel Ltd, NXP Semiconductors, Infineon Technologies (via ChipGlobe GmbH), and Valens again. In their most recent role, they served as a Verification Owner/Integrator at Intel Corporation starting in October 2020. Overall, Yaakov Farfel has over two decades of experience in the field of design verification engineering.
Yaakov Farfel attended the Moscow Institute of Electronic Technology (MIET) from 1976 to 1982. Yaakov pursued a degree in Microelectronics and successfully completed their studies, earning an MSEE (Master of Science in Electrical Engineering) degree from the institute.
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