MG

Mark Goldmacher

FPGA Soc Design Team Leader at Vayyar

Mark Goldmacher has over two decades of experience in the technology sector, currently serving as a Senior SW Developer at Vayyar Imaging Ltd. since September 2015. Prior to this role, Mark held various positions at Intel from April 2004, including SystemC Developer and VLSI/FPGA Engineer. Mark began their career as a H/W Engineer at Envara from July 2000 to April 2004.

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