Narayanan Kaniyur

Narayanan Kaniyur began their career as a Design Engineer at Zilog in 1994. In 1995, they joined Intel Corporation as a Staff Design Engineer and was responsible for design, validation, post silicon debug and design tools development. Narayanan then progressed to Engineering Manager, where they led the design of PCI Express subsystem, DFX and full chip RTL for Intel's first High Performance Computing SOC. In 2019, Narayanan moved to Marvell Semiconductor as a Senior Director - Digital IC Design, where they led the design of ThunderX server class ARM SOCs on leading edge process node targeting HPC, cloud and data center markets. In 2021, they returned to Intel Corporation as a Senior Director, leading platform solutions path finding for next generation FPGA product family and FPGA based Infrastructure Processing Unit (IPU) product development. Narayanan is currently Vice President, SOC Engineering at Ventana Micro Systems.

Narayanan Kaniyur obtained a Bachelor of Engineering degree in Electrical and Electronics Engineering from PSG College of Technology between 1984 and 1988. Narayanan then went on to pursue a Master of Science degree in Electrical Engineering at The University of Texas at Austin between 1992 and 1994.