Xiaojia Jia is a Hardware Development Engineer at Western Digital since July 2019, focusing on developing system-level features to enhance product performance, reliability, and power consumption while collaborating with VLSI designers to validate silicon functions. Prior to this role, Xiaojia served as a Graduate Research Assistant at Georgia Institute of Technology from August 2014 to June 2019, designing advanced organic TFTs and conducting simulations for III-V optoelectronic devices, as well as a Graduate Teaching Assistant in Analog Electronics. An internship as an Advanced Memory Development Engineer at Western Digital in 2017 involved developing a testing platform for 3D-NAND flash memory. Xiaojia holds a PhD in Electrical and Computer Engineering from Georgia Institute of Technology and a Master of Science in Electrical Engineering from Auburn University.
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