Yaniv Ben-Margi is an experienced VLSI Design Engineer with a robust background in digital VLSI design and verification. Currently serving as a Senior VLSI Design Engineer at Winbond since April 2017, Yaniv previously held the position of Senior ASIC Design and Verification Engineer at Texas Instruments from November 2005 to September 2016, where responsibilities included leading verification and digital VLSI designs for the Industrial Ethernet market. Prior roles include an FPGA and Verification Engineer at Crescendo Networks, where Yaniv designed a GZIP compressor on FPGA and managed data interface verification, as well as an FPGA Design Engineer at TeraCross Networks, focusing on designs for Ethernet switch solutions. Yaniv holds a Bachelor of Science degree in Electrical and Electronics Engineering from Ben-Gurion University of the Negev, earned in 2001, and is currently seeking new opportunities in VLSI verification and design areas.
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