Rachit Parsai is a Senior Engineer I specializing in ASIC Design at Alphawave IP Group since February 2022. Previously, Rachit served at SiFive from January 2020 to May 2022, holding positions as an Engineer-1 and Engineer in ASIC Design, along with an internship. Rachit holds a Master of Technology in VLSI Design from the International Institute of Information Technology Bangalore, obtained in 2020, and a Bachelor of Engineering in Electrical, Electronics, and Communications Engineering from Devi Ahilya Vishwavidyalaya, completed in 2017.
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