Evgueni Brevnov

Evgueni Brevnov has a diverse and extensive work experience in the software engineering field. Evgueni began their career in 2000 as a Researcher/Developer for the Interval Arithmetic team at the Russian Research Institute of Artificial Intelligence. From 2002 to 2004, they worked as a Software Engineer for Sun Microsystems/Unipro on the Netbeans performance team/Interval team.

In 2004, Brevnov joined Intel Corporation as a Senior Software Engineer. Evgueni held various roles within the company, including working on the Core Java API team, where they designed and implemented core Java classes. Evgueni also worked on the Dynamic Runtime Layer Virtual Machine (DRLVM) project, where they ported the DRLVM to EM64T architecture. Additionally, they implemented new initialization and shutdown procedures in the DRLVM. Brevnov also contributed to the Intel C/C++ Compiler, where they designed a new abstraction level for managing SIMD information and identified and removed bottlenecks causing compile time degradation. Evgueni later led a design effort and prototyped an approach to model loop peeling optimization using VPlan internal representation in LLVM.

Brevnov's most recent position was as a Senior software engineer at Azul Systems, where they implemented enhancements in object/array allocation fast path in Zing VM. This included high-level optimizations such as better inlining and improved calling conventions, as well as targeted optimizations for the x86 architecture.

Overall, Brevnov has demonstrated expertise and contributions throughout their career in various areas of software engineering, including optimization, compiler development, virtual machine design, and core Java development.

Evgueni Brevnov attended Novosibirsk State University (NSU) from 1997 to 2006. During this time, they pursued a Master of Science (MS) degree in Applied Mathematics and Computer Science.