CPU Performance Modeling Engineer

Condor is looking to hire a CPU Performance Modeling Engineer.  You will explore ways to improve the performance of very high-performance RISC-V processors, across all functions in the CPU core and memory systems.  You will leverage your processor architecture, design, and performance knowledge to work collaboratively with other people in the team, including engineers from the RTL design, verification, and software groups to propose enhancements, optimizations and features based on performance assessment and PPA impact.

Here is what you will do:

• Work with the rest of the Architecture team to propose an industry leading design, and create a model for this new processor
• Create executable specs by building domain specific functional models (C++) for next generation processors.
• Analyze and verify important performance characteristics at multiple levels of simulation, as well as with prototyping platforms and silicon. 
• Set team direction and propose methodologies towards developing a complete processor architectural functional model by integrating domain specific processor modules using C++ framework.
• Operate autonomously towards annotating timing/cycle information to functional models to build cycle approximate performance models
• Correlate performance model results against RTL simulation
• Partner with RTL design and Verification teams during the execution phase for formal/dynamic verification
• Demonstrate leadership in characterizing benchmarks, workloads and use cases (application code), and proposing microarchitectural optimizations for IPC improvements.

Here is the background we hope you have:

• Masters/Bachelor or above degree in electronic/electrical engineering or computer science
• 2+ years of CPU Architecture development or Processor Performance modeling experience with excellent knowledge of Computer Architecture
• Experience with processor/DSP designs, memory hierarchies, cache controllers, arithmetic units
• Hands on experience on a popular simulation framework or Instruction Set Simulator (Eg. GEM5, Spike, QEMU)
• Excellent C++ and scripting (shell & python) skills with exposure to SystemC and assembly for test cases
• Ability to start things from scratch, i.e create a code base from file 0 and ability to infuse code into existing model.
• Familiar with Industry standard interfaces like AMBA-AXI, AHB
• Familiar with in RTL design and coding with Verilog
• Familiar with RISC, CISC, VLIW ISA, compilers and debug tools
• Exceptional debugging and troubleshooting skills
• Excellent communication skills, teamwork skills and demonstrates autonomy
• Has a proven desire to learn and explore new technologies.  Demonstrates good research and problem-solving skills.

These would be nice to have but are not required:

• Good written and verbal communication skills
• Good cross site and cross function execution skills