Vibarajan Viswanathan

Vibarajan Viswanathan has a diverse and extensive work experience in the field of hardware and software engineering. Vibarajan started their career in 2000 as a Senior Hardware Engineer at Sasken Communication Technologies Ltd, where they developed protocol monitors and received recognition for their technical expertise.

In 2002, Viswanathan joined Synopsys Inc as a Manager R&D and later became an Engineering Project Leader. In this role, they managed teams and external partners to develop Assertion IPs for various protocols. Additionally, they collaborated with marketing and engineering teams to ensure the successful productization of Assertion IPs.

Moving forward, Viswanathan worked at Mentor Graphics Corporation as a Staff Verification Engineer. Here, they focused on developing Assertion IPs, Questa Verification Library, and SV-based Verification IP. Vibarajan also gained expertise in protocols such as AXI, SATA, PCI Express, GigaBit Ethernet, and I2C.

Viswanathan then joined Marvell Semiconductor as a Senior Staff Verification Engineer. In this role, they led the verification of DDR3/4 Memory Controller IP using System Verilog, VMM, UVM, and SVA. Vibarajan also created testbenches from scratch and ensured code coverage closure.

At Samsung SARC | ACL, Viswanathan held two positions. First, as a Senior Staff Engineer, they worked on CPU/GPU Front End/Verification Methodology and Coherent Interconnect Verification. Next, as a Senior Staff GPU Verification Engineer, they specialized in Cache Coherency and UVM, and developed a UVM bench for Memory Subsystem Cluster Verification.

Viswanathan then joined Centaur Technology as a CPU Verification Engineer. Vibarajan focused on X86 Processor Verification and was responsible for developing a UVM block-level testbench for a new L2 design.

In 2019, they served as a Technical Program Committee member and a Session Chair at DVCon U.S.

More recently, they worked at Microsoft as a Principal Cache Sub-System Verification Engineer, and they are currently employed as the Senior Principal Design Verification Lead at Condor Computing Corporation.

Vibarajan Viswanathan has a PG Diploma in Artificial Intelligence/Machine Learning from The University of Texas at Austin and a BE in Electronics and Communication Engineering from the University of Madras.