Axel Aguado

Axel Aguado is a Senior Design Verification Manager at ForwardEdge ASIC with previous experience in design verification at Micron Technology and engineering at IBM. Axel has expertise in VHDL logic design for processors, development of logic blocks, timing analysis, user documentation, and script development for chip testing. Axel also has experience in enhancing TCP/IP tools, secure IPSec connections, driver tests, and product code coverage. Axel holds a B.S. in Computer Engineering from Iowa State University.