Kevin N. Lam

Kevin N. Lam has extensive experience in the field of hardware engineering and ASIC design.

From 2022, they serve as the Head of ASIC Engineering at Quanergy.

Prior to that, they worked at L-Logic Design Group, Inc. as the Managing Director from August 2019 to December 2021. In this role, they provided engineering design services for the development of AI chips and boards, with a focus on power-sensitive, edge-inference devices. Kevin N. also offered expert consultancy on ASIC design methodology and flow to several chip startups.

Before joining L-Logic Design Group, Inc., they were the Managing Partner at L-Logic Design Complexes LLC from January 2013 to December 2021.

Kevin N. briefly worked as the Senior Director of Hardware at Groq in May 2019.

From 2015 to 2019, they served as the Senior Director of Engineering at Wave Computing, where they specialized in building boards and appliance systems for machine-learning hardware acceleration. Their expertise included ultra-high performance, semi-custom processor-based HW systems with unique power, thermal, acoustic, and density profiles. Kevin N. also drove the development of deep-learning accelerator validation boards and other related hardware.

From 2012 to 2015, they worked at SeaMicro Systems, Inc. as a Silicon Design Architect, where they were responsible for aspects of physical design, silicon implementation, signal and power integrity, and serial-link channel modeling for a fabric controller ASIC. Kevin N. achieved the first-silicon success at the designed performance target.

From 2009 to 2012, they held the position of Director of Silicon Engineering at PLX Technology, Inc., where they were responsible for IC packaging design programs for various product lines including PCI-Express and 10GE PHY. Kevin N. led multi-geographical, multidisciplinary teams to deliver new product introductions and built relationships with off-shore vendors and manufacturers.

Prior to that, from 2005 to 2007, they were a Microprocessor Physical Design Architect at AMD, where they developed design strategies for clock distribution, supply-domain partition, supply-noise decoupling, and high-speed source-synchronous interface buses.

From 2002 to 2005, they served as the Senior VLSI Design Manager at NetXen Inc., and from 2000 to 2002, they were a Technical Lead at Procket Networks, Inc.

Overall, Kevin N. Lam has a diverse and extensive background in hardware engineering, ASIC design, and leadership roles within the semiconductor industry.

Kevin N. Lam received degrees in both Electrical Engineering & Computer Science and Electrical Engineering from the Massachusetts Institute of Technology.