Srujan Cheedella is an experienced engineer currently working at SeviTech Systems Pvt. Ltd. as Engineer 1 since January 2022, having previously held the role of Associate Engineer A2. Prior to this, Srujan worked at UST as a Design Verification Engineer for a brief period from October 2021 to December 2021, and gained experience at Maven Silicon as an RTL design and verification trainee from August 2020 to September 2021. Srujan holds a Bachelor of Technology degree in Electrical, Electronic and Communications Engineering Technology from Vellore Institute of Technology, completed in 2020.
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