Raga Sai Korumilli is a Senior Physical Design Engineer at SmartSoC Solutions Pvt Ltd since July 2023, bringing valuable expertise from previous roles as an Associate Engineer at Cerium Systems from April 2021 to July 2023 and as a Physical Design Trainee at ChipEdge Technologies Pvt Ltd from October 2020 to March 2021. Raga Sai Korumilli holds a Bachelor of Engineering in Electronics and Communications Engineering from Chaitanya Bharathi Institute Of Technology, completed in 2020, and a Diploma in Electronics and Communications Engineering from the Government Institute Of Electronics, Secunderabad, obtained in 2016.
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