Hong Zeng is an experienced Project Lead with expertise in designing services for AMD flagship graphics chips on TSMC 28nm 1P10M process at Synapse Design Automation Inc. They have also worked as a Senior physical design engineer at Verisilicon Microelectronics Co., Ltd, and as an ASIC design engineer at Agere Systems Co., Ltd. Their experience includes tapeouting chips from 180nm to 65nm processes and working with a variety of consumer electronics and communication devices.
March, 2010 - present
Technical Project Lead Exterior Sound/ Sound Design at Continental Engineering Services
Technical Project Lead at SPOSEA B.V.
Project Leader IT To Business Alignment & User Experience at Edelweiss Air AG
E-commerce QA Project Lead at Stridely Solutions
HR Process Expert & Project Lead Global Talent Management at Maschinenfabrik Reinhausen
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