Suresh Babu T R

Suresh Babu T R has over 20 years of work experience in the semiconductor industry. Suresh is currently serving as the Senior Director of the VLSI IP Engineering Group at Alphawave Semi, where they specialize in D2D, C2C, UCIe, IO Chiplets, and various IP designs for HBM, LPDDR, DDR Controller and PHY. Prior to this, Suresh worked at Xilinx for 10 years, holding various roles such as Senior Design Engineering Manager and Design Engineering Manager in the Ethernet and Interlaken Solution Group. Suresh has extensive experience in managing and developing IP products for different Ethernet protocols, as well as designing and validating IP cores. Before Xilinx, Suresh worked at Aricent Group as a Technical Leader and was involved in FPGA development and testing for wireless domains, including GSM and 3GPP LTE. Suresh also has experience at Invensys (now Schneider Electric) as a Senior Design Engineer, focusing on FPGA implementation in safety-critical rail domains. Suresh began their career at Samsung Electronics as a Senior Engineer, where they worked on FPGA design and verification projects, including USB controller implementation and TMDS protocol. Throughout their career, Suresh has demonstrated expertise in RTL coding, VHDL, Verilog, and design and verification methodologies.

Suresh Babu T R completed their Master of Technology (M.Tech.) degree in VLSI Design & Embedded Systems from Regional College, VTU, Karnataka, Bangalore. Prior to that, they earned a Bachelor of Engineering (B.E.) degree in Electronics and Communication from Vijayanagar Engg College, Bellary, Karnataka. Suresh also obtained certification in Mentor Graphics Product Training from Mentor Graphics in 2013.