Mark Powers has a diverse work experience in the field of ASIC Design. Mark started their career at Raytheon as a Digital Design Engineer in 1997 and then moved to Texas Instruments in 1999 in the same role. In 2001, they joined STMicroelectronics as a Senior Staff Engineer, where they were involved in various aspects of ASIC design, including RTL, DFT, synthesis, and verification. In 2015, they joined ams AG as a Principal Design Engineer. Currently, they are working at ams OSRAM as a Senior Principal Design Engineer.
Mark Powers attended Oklahoma State University where they pursued a Master of Science in Electrical Engineering (MSEE) with a focus on Digital Signal Processing (DSP) and Digital Image Processing. The duration of their education at this institution is unknown.
August, 2015 - present
Principal Design Engineer, Senior Member Of Technical Staff at Qorvo
Technical Lead & Principal Design Engineer at AMS
Principal Design Engineer at Cirrus Logic
Principal Design Engineer at Monte Sano Research Corporation
Principal Design Engineer at AMRC
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