Yuval Gilad

Yuval Gilad has a diverse work experience in various companies and roles. Yuval started their career in 2006 as an Avionics Course Sergeant/Commander in the Israeli Air Force, where they taught recruits and was responsible for their military discipline. From 2010 to 2011, they worked as a Mobile Applications developer at Cellulup and as a private tutor at Ben Gurion University, teaching undergrad students in engineering courses. In 2011, they joined PMC-Sierra as a VLSI design and verification engineer, working on the design and verification team of a communication Chip. From 2012 to 2016, they worked at Cadence Design Systems, first as an Application Engineer providing support for verification solutions, and later as a Lead Product Engineer in the Verification IP group supporting AMBA protocol family customers. In 2016, they joined SolarEdge Technologies as a HW Engineer, focusing on PCB Analog design and power supply challenges. Yuval then returned to Cadence Design Systems in 2017 as a Principal Application Engineer, providing technical support and consultation on simulation tool suite and functional verification tools. Their most recent role was at Arteris IP starting in 2022 as a Sr Applications Engineer.

Yuval Gilad completed a Bachelor of Science (B.Sc.) in Electrical and Electronics Engineering at Ben-Gurion University of the Negev from 2008 to 2012. Following this, they pursued a Master's Degree in Electrical and Electronics Engineering at Tel Aviv University from 2014 to 2016.