Cheng Wang

Cheng Wang holds a BSEECS from UC Berkeley. He had two years as VLSI designer at Zoran. He took MSEE, EE PhD at UCLA: designed 5 FPGA chips from 90nm to 40nm. 2013 Distinguished PhD Dissertation Award. 2014 ISSCC Lewis Winner Award for Outstanding Paper. Cheng has led the architecture, silicon implementation and software development for eFPGA over two generations from 180nm-7nm and now neural inferencing. He had multiple patents at UCLA and Flex Logix.