David Delgadillo

Principal ASIC Design Engineer at Rambus

David Delgadillo has a diverse work experience in the field of design engineering. David started their career in 2004 as an ASIC Design Engineer at Covaro Networks. From there, they worked as an ASIC Design Engineer at Pelco in 2005. In 2006, they joined ADVA Optical Networking as an ASIC/FPGA Design Engineer and also worked as a Principal Design Engineer at Fujitsu Network Communications during the same year. David then became a Senior Staff Engineer at Inphi Corporation in 2014 and later worked as an SMTS II at Rambus from 2016 to 2018. David then joined Spirent Communications as a Sr Staff FPGA Engineer, and in 2020, they became an FPGA / ASIC Design Engineer at Kernel. David worked as a Principal FPGA Design Engineer at Canoga Perkins from 2022 to 2023. David'scurrent role is as a Principal ASIC Design Engineer at Rambus since 2023.

David Delgadillo attended Stanford University from 1983 to 1987 and earned a Bachelor of Science degree in Electrical Engineering.

Links

Previous companies

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Timeline

  • Principal ASIC Design Engineer

    April, 2023 - present

  • SMTS II

    August, 2016